Bullish

Huawei Scientist Claims Nvidia AI Chip Scaling Hits Physical Limits

2026-08-04 15:29

Liao Heng argues Western chip scaling faces physical bottlenecks, citing Huawei's new 'Tau Scaling Law' for inter-chip efficiency and upcoming mobile chip launch.

Woofun AI reports that Huawei semiconductor scientist Liao Heng stated Western manufacturers like Nvidia face physical limits when expanding chip scale and HBM memory. He noted that shrinking transistor dimensions is nearing a bottleneck, while Huawei explores the "Tau Scaling Law" to boost data transmission efficiency. Liao Heng confirmed plans to launch a mobile chip based on this concept soon, inviting teardowns by SemiAnalysis and TechInsights. He also highlighted the divergence of Chinese and US semiconductor supply chains into independent ecosystems, urging collaborative innovation to counter external restrictions.

WOOFUN AI

Impact Assessment · Quick Read

The assertion that traditional scaling is hitting physical walls validates industry concerns over Moore's Law slowdowns. Huawei's pivot to inter-chip efficiency via the 'Tau Scaling Law' could redefine performance metrics if successfully commercialized. The push for independent ecosystems may accelerate regional fragmentation in semiconductor supply chains, impacting global tech dependencies.
Generated by WOOFUN AI · For reference only, not investment advice

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